A semiconductor device may have a cell field with drift zones of a first type of conductivity and charge carrier compensation zones of a second type of conductivity complementary to the first. The cell field is surrounded by an edge region which has a higher blocking strength than the cell field.
In attempting to achieve high avalanche strength in semiconductor devices of this type with charge carrier compensation structures, the fact that the blocking strength of the edge region is greater than that of the cell field means that breakdown takes place in the cell field first and that it is possible, since the area of the cell field through which the current passes is greater than the area of the edge region, to run a higher current in the semiconductor device without damaging the semiconductor device. When a switch with a semiconductor device of this type breaks down, the load current continues via charge carrier pairs generated by avalanche multiplication. These charge carriers flow at saturation drift speed through the blocking depletion layer in the active region of the semiconductor and consequently lead to a change in electrical field distribution.
In semiconductor devices with column-shaped charge carrier compensation zones the charge carriers generated by avalanche multiplication are separated by the transverse electrical field of the columns, and the holes flow through the p-columns towards source while the electrons in the n-region flow towards drain. However, the aforementioned change in electrical field distribution creates high field zones in the semiconductor chip which, when current densities are sufficiently high, lead to excessive carrier generation and finally cause a breakdown of the blocking voltage at the semiconductor device. This permits the generation of oscillations which may lead to the destruction of the device.
To achieve higher blocking strength in the edge region, it is possible to provide in the edge region a charge carrier compensation structure in which the charge carrier compensation zones in the edge region are positioned in a smaller grid than in the cell field, for example in a half cell field grid. This guarantees, in combination with a suitable dopant concentration of the drift zones and the charge carrier compensation zones, a higher blocking strength at the edge than in the cell field. The semiconductor devices described above may for example be produced by a layered building-up of a plurality of epitactically grown semiconductor layers, wherein in at least some of the semiconductor layers the doping of the drift zones and/or the charge carrier compensation zones is inserted via openings in masks, for example by ion implantation. However, when the grid pitch of the charge carrier compensation zones and accordingly the openings of the masks are reduced, fluctuations in the accuracy of the compensation doping occur—due to fluctuations in the dimensions of the photoresist of the implantation masks in the edge region, for example—thereby limiting the dopant level.
Moreover, it is possible in the region of the active cell field to provide charge carrier compensation columns and drift zone columns with variable doping in which, when reverse-biased, it is possible to generate specific electrical field peaks at which avalanche-generated charge carriers flow first through regions with lower field strength, so that the change of the electric field does not lead to an immediate avalanche-generation of secondary charge carriers thereby preventing oscillations and/or the breakdown of the blocking voltage described above. Not until relatively high current densities are achieved do these regions contribute to the further generation of charge carriers. However, the blockability of the device has to be partly sacrificed due to the variable doping of the columns, whereby the electrical field as a result has a correspondingly greater ripple. This means that when these methods are used to increase avalanche strength neither blockability nor on-state resistance may be utilised optimally.
For these and other reasons, there is a need for the present invention.